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High Performance ASIC Design

Description

Presenting a methodology for using domino logic in an ASIC design flow developed over several years in an industrial context, this text covers practical issues related to the use of domino logic in an automated framework, and brings together all the knowledge needed to apply thesedesign techniques in practice. Beginning with a discussion of how to achieve high speed in ASIC designs, subsequent chapters detail the design and characterization of standard cell compatible domino logic libraries and an advanced domino logic synthesis flow. The results achieved by using automated domino logic design techniques, including silicon measurements, are used to validate the presented solution. With design examples including the implementation of the execution unit of a microprocessor and a Viterbi decoder, this text is ideal for graduatestudents and researchers in electrical and computer engineering and also for circuit designers in industry. 

Keywords

domino cells domino logic cells domino synthesis domino buffer domino register precharge failures domino logic design using domino logic domino library interclock skew domino design worst negative slack precharge delay clock insertion delay crosstalk tolerance phase skipping hold time failure domino implementation logic standard cells four clock phases multi cycle paths domino gate dynamic logic styles clock tree synthesis domino circuits

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